7 #define SDMMC_BASE 0x10006000 10 #define REG_SDPORTSEL 0x02 11 #define REG_SDCMDARG 0x04 12 #define REG_SDCMDARG0 0x04 13 #define REG_SDCMDARG1 0x06 14 #define REG_SDSTOP 0x08 15 #define REG_SDBLKCOUNT 0x0a 17 #define REG_SDRESP0 0x0c 18 #define REG_SDRESP1 0x0e 19 #define REG_SDRESP2 0x10 20 #define REG_SDRESP3 0x12 21 #define REG_SDRESP4 0x14 22 #define REG_SDRESP5 0x16 23 #define REG_SDRESP6 0x18 24 #define REG_SDRESP7 0x1a 26 #define REG_SDSTATUS0 0x1c 27 #define REG_SDSTATUS1 0x1e 29 #define REG_SDIRMASK0 0x20 30 #define REG_SDIRMASK1 0x22 31 #define REG_SDCLKCTL 0x24 33 #define REG_SDBLKLEN 0x26 34 #define REG_SDOPT 0x28 35 #define REG_SDFIFO 0x30 37 #define REG_DATACTL 0xd8 38 #define REG_SDRESET 0xe0 39 #define REG_SDPROTECTED 0xf6 //bit 0 determines if sd is protected or not? 41 #define REG_DATACTL32 0x100 42 #define REG_SDBLKLEN32 0x104 43 #define REG_SDBLKCOUNT32 0x108 44 #define REG_SDFIFO32 0x10C 46 #define REG_CLK_AND_WAIT_CTL 0x138 47 #define REG_RESET_SDIO 0x1e0 49 #define TMIO_STAT0_CMDRESPEND 0x0001 50 #define TMIO_STAT0_DATAEND 0x0004 51 #define TMIO_STAT0_CARD_REMOVE 0x0008 52 #define TMIO_STAT0_CARD_INSERT 0x0010 53 #define TMIO_STAT0_SIGSTATE 0x0020 54 #define TMIO_STAT0_WRPROTECT 0x0080 55 #define TMIO_STAT0_CARD_REMOVE_A 0x0100 56 #define TMIO_STAT0_CARD_INSERT_A 0x0200 57 #define TMIO_STAT0_SIGSTATE_A 0x0400 58 #define TMIO_STAT1_CMD_IDX_ERR 0x0001 59 #define TMIO_STAT1_CRCFAIL 0x0002 60 #define TMIO_STAT1_STOPBIT_ERR 0x0004 61 #define TMIO_STAT1_DATATIMEOUT 0x0008 62 #define TMIO_STAT1_RXOVERFLOW 0x0010 63 #define TMIO_STAT1_TXUNDERRUN 0x0020 64 #define TMIO_STAT1_CMDTIMEOUT 0x0040 65 #define TMIO_STAT1_RXRDY 0x0100 66 #define TMIO_STAT1_TXRQ 0x0200 67 #define TMIO_STAT1_ILL_FUNC 0x2000 68 #define TMIO_STAT1_CMD_BUSY 0x4000 69 #define TMIO_STAT1_ILL_ACCESS 0x8000 71 #define TMIO_MASK_ALL 0x837f031d 73 #define TMIO_MASK_GW (TMIO_STAT1_ILL_ACCESS | TMIO_STAT1_CMDTIMEOUT | TMIO_STAT1_TXUNDERRUN | TMIO_STAT1_RXOVERFLOW | \ 74 TMIO_STAT1_DATATIMEOUT | TMIO_STAT1_STOPBIT_ERR | TMIO_STAT1_CRCFAIL | TMIO_STAT1_CMD_IDX_ERR) 76 #define TMIO_MASK_READOP (TMIO_STAT1_RXRDY | TMIO_STAT1_DATAEND) 77 #define TMIO_MASK_WRITEOP (TMIO_STAT1_TXRQ | TMIO_STAT1_DATAEND) 95 uint32_t devicenumber;
100 int sdmmc_sdcard_init();
101 int sdmmc_sdcard_readsector(uint32_t sector_no, uint8_t *out);
102 int sdmmc_sdcard_readsectors(uint32_t sector_no, uint32_t numsectors, uint8_t *out);
103 int sdmmc_sdcard_writesector(uint32_t sector_no,
const uint8_t *in);
104 int sdmmc_sdcard_writesectors(uint32_t sector_no, uint32_t numsectors,
const uint8_t *in);
106 int sdmmc_nand_readsectors(uint32_t sector_no, uint32_t numsectors, uint8_t *out);
107 int sdmmc_nand_writesectors(uint32_t sector_no, uint32_t numsectors,
const uint8_t *in);
109 int sdmmc_get_cid(
bool isNand, uint32_t *info);
122 static inline uint16_t sdmmc_read16(uint16_t reg) {
124 return *(
volatile uint16_t*)(SDMMC_BASE + reg);
128 static inline void sdmmc_write16(uint16_t reg, uint16_t val) {
130 *(
volatile uint16_t*)(SDMMC_BASE + reg) = val;
134 static inline uint32_t sdmmc_read32(uint16_t reg) {
136 return *(
volatile uint32_t*)(SDMMC_BASE + reg);
140 static inline void sdmmc_write32(uint16_t reg, uint32_t val) {
142 *(
volatile uint32_t*)(SDMMC_BASE + reg) = val;
146 static inline void sdmmc_mask16(uint16_t reg,
const uint16_t clear,
const uint16_t
set) {
148 uint16_t val = sdmmc_read16(reg);
151 sdmmc_write16(reg, val);
154 static inline void setckl(uint32_t data)
156 sdmmc_mask16(REG_SDCLKCTL,0x100,0);
157 sdmmc_mask16(REG_SDCLKCTL,0x2FF,data&0x2FF);
158 sdmmc_mask16(REG_SDCLKCTL,0x0,0x100);